Profile
Assistant Professor · Electrical Engineering

Srinivas Rahul Sapireddy

College of Engineering · Illinois State University
Illinois State University · Bloomington–Normal, Illinois
ssapire@illinoisstate.edu · Office: 236, 1709 General Electric Rd, Bloomington, IL 61704
Ph.D., Electrical & Computer Engineering · University of Missouri–Kansas City

Research interests: hardware-aware AI, RF signal intelligence, edge computing, and VLSI systems

Low-Power Edge AI RF Signal Intelligence VLSI Systems Hardware-Aware ML
Hardware-Aware AI
RF Signal Intelligence
Low-Power Edge Computing
VLSI Physical Design
Custom Activation Functions
Embedded Intelligence
Hardware-Aware AI
RF Signal Intelligence
Low-Power Edge Computing
VLSI Physical Design
Custom Activation Functions
Embedded Intelligence
AI
Hardware-Aware ML
Efficient learning for edge platforms
RF
Signal Intelligence
Classification, sensing, and feature extraction
VLSI
Hardware Systems
RTL-to-GDSII and implementation flow
Edge
Low-Power Computing
Latency, memory, and power-aware systems
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About

I am an Assistant Professor in Electrical Engineering at Illinois State University. My research focuses on hardware-aware artificial intelligence, RF signal processing, edge-intelligent systems, and VLSI design. I develop efficient machine learning and signal-processing methods for resource-constrained computing platforms.

Hardware-Aware AI · RF · VLSI
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Research Areas

  • Hardware-aware machine learning for low-power edge intelligence
  • RF signal processing and modulation classification using statistical and cyclostationary features
  • Custom piecewise-linear activation functions for efficient neural network inference
  • VLSI physical design, RTL-to-GDSII flow, and hardware acceleration
  • Embedded AI deployment for communication and sensing applications
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Recent Achievement

Received the Best Paper Award at RFCoN 2025 for “Re-Visiting R: Statistical Envelope Analysis” in Track 2, Session II.

IEEE RFCoN 2025

RF • Antenna Design • CST Simulation

CST-Based Microstrip Patch Antenna Design

Inset-fed patch antenna modeling for RF communication, antenna optimization, and machine-learning-assisted electromagnetic design.

CST simulation of inset-fed microstrip patch antenna
Inset-Fed Microstrip Patch Antenna — CST Model

📰 Latest News

📰 Latest News

July 2026

Featured in The Pantagraph

Featured in The Pantagraph’s coverage of Illinois State University’s new College of Engineering building, discussing the Digital and Microcontrollers Laboratory and hands-on electrical engineering education.

View Media Coverage →
2025

Best Paper Award at RFCoN

Received Best Paper Award for statistical envelope analysis work in RF modulation classification.

Research

Low-Power RF and Edge-AI Systems

Current work integrates RF signal processing, hardware-aware machine learning, and efficient edge deployment.

📂 Quick Access

🔬 INSys Lab

Research group, projects, students, and lab activities

📝 Publications

Journal articles, conference papers, and manuscripts

📚 Teaching

Courses, instructional materials, and mentoring activities

📄 Resume

Academic background, research, teaching, and service

✍️ Blog

Technical posts on ML, RF systems, and VLSI workflows

🤝 Service

University service, outreach, and professional activities

🚀 Research and Innovation Themes

R-Value Envelope Statistics
CAF-Aware Feature Engineering
Custom Piecewise Activations
Edge-AI Deployment
Hardware-Aware Evaluation
R-Value Envelope Statistics
CAF-Aware Feature Engineering
Custom Piecewise Activations
Edge-AI Deployment
Hardware-Aware Evaluation

RF Signal Intelligence

Lightweight RF signal classification using envelope statistics, feature engineering, and signal-domain analysis.

Hardware-Aware AI

Efficient neural models, custom activations, and deployment-aware learning for constrained platforms.

Low-Power Edge Systems

Runtime, memory, power, and latency-aware model evaluation for edge and embedded systems.

🎥 Featured Demos

🏆 Hackathon Win – Fall 2021
🏆 Hackathon Win – Fall 2022
🎓 Internship Summary: SmartBridge
K-12 STEM Demo
🔬 K-12 STEM Demo – Simple DC Motor

🖼️ Highlights

Academic Fair K12 STEM Media IEEE Lecture ASIC Teaching Academic Fair GLSVLSI Best Paper

🔗 LinkedIn and Visitor Map

You can connect with me through LinkedIn.

📬 Connect with Me

I welcome research collaboration, student mentoring discussions, outreach partnerships, and academic engagement related to hardware-aware AI, RF systems, edge computing, and VLSI design.

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